AMD Zen 6 puts twelve cores and 48MB L3 on one chiplet

AMD’s upcoming Zen 6 architecture could feature 12 full-performance cores and 48MB of shared L3 cache on a single chiplet, potentially addressing the latency penalties of previous dual-chiplet designs. Technical details revealed during a server processor deep-dive indicate significant IPC improvements, better branch prediction, and potential future support for massive 144MB 3D V-Cache configurations. Open article →