Solo designer tapes out open-source networking ASIC on GlobalFoundries 180nm in 96 hours

The author details the process of designing and taping out an open-source networking ASIC chip solo in just 96 hours using services from wafer.space on GlobalFoundries' 180nm process. The final chip integrates a four-port networking switch and an ethernet-connected broadcast beacon, overcoming challenges related to area, strict timing constraints, and pin configurations. Open article →